Apply Toit patches onto 5.3.1

.gitmodules

@@ -59,7 +59,7 @@
 
 [submodule "components/mbedtls/mbedtls"]
 	path = components/mbedtls/mbedtls
-	url = ../../espressif/mbedtls.git
+	url = ../../toitlang/mbedtls.git
 
 [submodule "components/lwip/lwip"]
 	path = components/lwip/lwip

README.toitlang

@@ -0,0 +1,66 @@
+# How to update the Toit fork
+
+Start by fetching upstream:
+```
+git add remote upstream https://github.com/espressif/esp-idf.git
+git fetch upstream
+```
+
+Get the Toit commits as follows:
+```
+git rev-list --reverse --no-merges release/v5.1..patch-head-5.1
+```
+Replace `release/v5.1` with the tag of the base release and `patch-head-5.1`
+with the branch that contains the patches.
+
+There shouldn't be too many patches. Consider going through them manually to
+see if they are still relevant. For example, multiple sub-component rolls
+could sometimes be squashed into a single commit.
+
+Add `--oneline` to the `git rev-list` command to get a description with the
+commit hash.
+
+## Create a new patch-head
+Check out the tag you want to base Toit's fork on:
+```
+git checkout v5.3.1
+```
+
+Note: we used to base our fork on the `release/vX.Y` branches, but
+tags seem safer and there doesn't seem to be an upside to using the
+branches.
+
+Create a new branch for the patches:
+```
+git checkout -b patch-head-5.3.1
+```
+
+## Apply Toit's patches
+
+Apply the patches to the fork:
+```
+git rev-list ... | xargs git cherry-pick
+```
+If you are lucky and all patches apply cleanly, you are done. Otherwise, you
+will have to resolve conflicts manually. In this case I apply the patches
+one by one and resolve conflicts as they come up.
+
+## Mbedtls
+
+Move into the mbedtls directory:
+```
+cd components/mbedtls/mbedtls
+```
+
+Find the mbedtls commit that is used in the ESP-IDF version:
+```
+git log -n1 --oneline
+```
+
+Switch to Toit's mbedtls fork and check out that commit.
+Then apply Toit's patches to it. Follow the same instructions as
+for the ESP-IDF patches.
+
+Upload the mbedtls branch and check them out in the ESP-IDF repo. This
+is a typical submodule update.
+

components/esp_eth/include/esp_eth_mac_esp.h

@@ -217,64 +217,64 @@ typedef enum {
 #error "Unsupported RMII clock mode"
 #endif // CONFIG_ETH_RMII_CLK_INPUT
 
-#define ETH_ESP32_EMAC_DEFAULT_CONFIG()               \
-    {                                                 \
-        .smi_gpio =                                   \
-        {                                             \
-            .mdc_num = 23,                            \
-            .mdio_num = 18                            \
-        },                                            \
-        .interface = EMAC_DATA_INTERFACE_RMII,        \
-        .clock_config =                               \
-        {                                             \
-            .rmii =                                   \
-            {                                         \
-                .clock_mode = DEFAULT_RMII_CLK_MODE,  \
-                .clock_gpio = DEFAULT_RMII_CLK_GPIO   \
-            }                                         \
-        },                                            \
-        .dma_burst_len = ETH_DMA_BURST_LEN_32,        \
-        .intr_priority = 0,                           \
+#define ETH_ESP32_EMAC_DEFAULT_CONFIG()                                       \
+    {                                                                         \
+        .smi_gpio =                                                           \
+        {                                                                     \
+            .mdc_num = 23,                                                    \
+            .mdio_num = 18                                                    \
+        },                                                                    \
+        .interface = EMAC_DATA_INTERFACE_RMII,                                \
+        .clock_config =                                                       \
+        {                                                                     \
+            .rmii =                                                           \
+            {                                                                 \
+                .clock_mode = DEFAULT_RMII_CLK_MODE,                          \
+                .clock_gpio = (emac_rmii_clock_gpio_t) DEFAULT_RMII_CLK_GPIO  \
+            }                                                                 \
+        },                                                                    \
+        .dma_burst_len = ETH_DMA_BURST_LEN_32,                                \
+        .intr_priority = 0,                                                   \
     }
 #elif CONFIG_IDF_TARGET_ESP32P4
-#define ETH_ESP32_EMAC_DEFAULT_CONFIG()               \
-    {                                                 \
-        .smi_gpio =                                   \
-        {                                             \
-            .mdc_num = 31,                            \
-            .mdio_num = 27                            \
-        },                                            \
-        .interface = EMAC_DATA_INTERFACE_RMII,        \
-        .clock_config =                               \
-        {                                             \
-            .rmii =                                   \
-            {                                         \
-                .clock_mode = EMAC_CLK_EXT_IN,        \
-                .clock_gpio = 50                      \
-            }                                         \
-        },                                            \
-        .clock_config_out_in =                        \
-        {                                             \
-            .rmii =                                   \
-            {                                         \
-                .clock_mode = EMAC_CLK_EXT_IN,        \
-                .clock_gpio = -1                      \
-            }                                         \
-        },                                            \
-        .dma_burst_len = ETH_DMA_BURST_LEN_32,        \
-        .intr_priority = 0,                           \
-        .emac_dataif_gpio =                           \
-        {                                             \
-            .rmii =                                   \
-            {                                         \
-                .tx_en_num = 49,                      \
-                .txd0_num = 34,                       \
-                .txd1_num = 35,                       \
-                .crs_dv_num = 28,                     \
-                .rxd0_num = 29,                       \
-                .rxd1_num = 30                        \
-            }                                         \
-        },                                            \
+#define ETH_ESP32_EMAC_DEFAULT_CONFIG()                                       \
+    {                                                                         \
+        .smi_gpio =                                                           \
+        {                                                                     \
+            .mdc_num = 31,                                                    \
+            .mdio_num = 27                                                    \
+        },                                                                    \
+        .interface = EMAC_DATA_INTERFACE_RMII,                                \
+        .clock_config =                                                       \
+        {                                                                     \
+            .rmii =                                                           \
+            {                                                                 \
+                .clock_mode = EMAC_CLK_EXT_IN,                                \
+                .clock_gpio = (emac_rmii_clock_gpio_t) 50                     \
+            }                                                                 \
+        },                                                                    \
+        .clock_config_out_in =                                                \
+        {                                                                     \
+            .rmii =                                                           \
+            {                                                                 \
+                .clock_mode = EMAC_CLK_EXT_IN,                                \
+                .clock_gpio = (emac_rmii_clock_gpio_t) -1                     \
+            }                                                                 \
+        },                                                                    \
+        .dma_burst_len = ETH_DMA_BURST_LEN_32,                                \
+        .intr_priority = 0,                                                   \
+        .emac_dataif_gpio =                                                   \
+        {                                                                     \
+            .rmii =                                                           \
+            {                                                                 \
+                .tx_en_num = 49,                                              \
+                .txd0_num = 34,                                               \
+                .txd1_num = 35,                                               \
+                .crs_dv_num = 28,                                             \
+                .rxd0_num = 29,                                               \
+                .rxd1_num = 30                                                \
+            }                                                                 \
+        },                                                                    \
     }
 #endif // CONFIG_IDF_TARGET_ESP32P4
 

components/esp_system/ld/esp32/sections.ld.in

@@ -413,6 +413,7 @@ SECTIONS
      * driver to maintain the virtual address.
      * NOLOAD rodata may not be included in this section.
      */
+    . += _esp_rodata_section_padding;
     _rodata_reserved_end = ABSOLUTE(.);
 
     mapping[rodata_noload]

components/esp_system/ld/esp32c2/sections.ld.in

@@ -296,6 +296,7 @@ SECTIONS
      * driver to maintain the virtual address.
      * NOLOAD rodata may not be included in this section.
      */
+    . += _esp_rodata_section_padding;
     _rodata_reserved_end = ADDR(.flash.tbss);
 
     mapping[rodata_noload]

components/esp_system/ld/esp32c3/sections.ld.in

@@ -414,6 +414,7 @@ SECTIONS
      * driver to maintain the virtual address.
      * NOLOAD rodata may not be included in this section.
      */
+    . += _esp_rodata_section_padding;
     _rodata_reserved_end = ADDR(.flash.tbss);
 
     mapping[rodata_noload]

components/esp_system/ld/esp32c6/sections.ld.in

@@ -427,6 +427,7 @@ SECTIONS
      * driver to maintain the virtual address.
      * NOLOAD rodata may not be included in this section.
      */
+    . += _esp_rodata_section_padding;
     _rodata_reserved_end = ADDR(.flash.tbss);
 
     mapping[rodata_noload]

components/esp_system/ld/esp32h2/sections.ld.in

@@ -427,6 +427,7 @@ SECTIONS
      * driver to maintain the virtual address.
      * NOLOAD rodata may not be included in this section.
      */
+    . += _esp_rodata_section_padding;
     _rodata_reserved_end = ADDR(.flash.tbss);
 
     mapping[rodata_noload]

components/esp_system/ld/esp32s2/sections.ld.in

@@ -396,6 +396,7 @@ SECTIONS
      * driver to maintain the virtual address.
      * NOLOAD rodata may not be included in this section.
      */
+    . += _esp_rodata_section_padding;
     _rodata_reserved_end = ABSOLUTE(.);
 
     mapping[rodata_noload]

components/esp_system/ld/esp32s3/sections.ld.in

@@ -423,6 +423,7 @@ SECTIONS
      * driver to maintain the virtual address.
      * NOLOAD rodata may not be included in this section.
      */
+    . += _esp_rodata_section_padding;
     _rodata_reserved_end = ABSOLUTE(.);
 
     mapping[rodata_noload]

components/esp_system/ld/ld.common

@@ -43,6 +43,12 @@
 
 #define ALIGN_UP(SIZE, AL)   (((SIZE) + (AL - 1)) & ~(AL - 1))
 
+#ifdef CONFIG_RODATA_PADDING
+_esp_rodata_section_padding = CONFIG_RODATA_PADDING;
+#else
+_esp_rodata_section_padding = 0;
+#endif
+
 #if CONFIG_SOC_RTC_MEM_SUPPORTED
     #if CONFIG_BOOTLOADER_RESERVE_RTC_MEM
         #ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC

components/esp_system/startup.c

@@ -192,7 +192,7 @@ static void do_secondary_init(void)
 #endif
 }
 
-static void start_cpu0_default(void)
+void start_cpu0_default(void)
 {
     // Initialize core components and services.
     do_core_init();

components/heap/CMakeLists.txt

@@ -13,11 +13,19 @@ set(srcs
     "heap_caps_init.c"
     "multi_heap.c")
 
+if(CONFIG_CMPCT_MALLOC_HEAP)
+    list(APPEND srcs "third_party/dartino/cmpctmalloc.c")
+endif()
+
 set(includes "include")
 
-if(NOT CONFIG_HEAP_TLSF_USE_ROM_IMPL)
-    set(priv_includes "tlsf")
-    list(APPEND srcs "tlsf/tlsf.c")
+if(NOT CONFIG_CMPCT_MALLOC_HEAP)
+    list(APPEND srcs "multi_heap.c")
+
+    if(NOT CONFIG_HEAP_TLSF_USE_ROM_IMPL)
+        set(priv_includes "tlsf")
+        list(APPEND srcs "tlsf/tlsf.c")
+    endif()
 endif()
 
 if(NOT CONFIG_HEAP_POISONING_DISABLED)

components/heap/Kconfig

@@ -1,5 +1,13 @@
 menu "Heap memory debugging"
 
+config CMPCT_MALLOC_HEAP
+    bool "Use Toitware's CmpctMalloc implementation"
+    default y
+    help
+        This uses the CmpctMalloc ported from Dartino and the LK kernel.
+        This is needed to ensure that 4k allocations are aligned, which
+        the Toit VM relies on.
+
     choice HEAP_CORRUPTION_DETECTION
         prompt "Heap corruption detection"
         default HEAP_POISONING_DISABLED

components/heap/heap_caps.c

@@ -8,6 +8,10 @@
 #include <assert.h>
 #include <stdio.h>
 #include <sys/param.h>
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+
 #include "esp_attr.h"
 #include "esp_heap_caps.h"
 #include "multi_heap.h"
@@ -298,6 +302,39 @@ size_t heap_caps_get_minimum_free_size( uint32_t caps )
     return ret;
 }
 
+void heap_caps_iterate_tagged_memory_areas(void *user_data, void *tag, tagged_memory_callback_t callback, uint32_t flags, uint32_t caps)
+{
+    heap_t *heap;
+    SLIST_FOREACH(heap, &registered_heaps, next) {
+        if (heap_caps_match(heap, caps)) {
+            multi_heap_iterate_tagged_memory_areas(heap->heap, user_data, tag, callback, flags);
+        }
+    }
+}
+
+void heap_caps_set_option(int option, void *value)
+{
+    heap_t *heap;
+    if (option == MALLOC_OPTION_THREAD_TAG) {
+      // For efficiency we don't do this on every heap, since the setting is
+      // per-thread, not per-heap.
+      multi_heap_set_option(NULL, option, value);
+    } else {
+      SLIST_FOREACH(heap, &registered_heaps, next) {
+          multi_heap_set_option(heap->heap, option, value);
+      }
+    }
+}
+
+void *heap_caps_get_option( int option )
+{
+    if (option == MALLOC_OPTION_THREAD_TAG) {
+        return multi_heap_get_option(option);
+    } else {
+        return NULL;
+    }
+}
+
 size_t heap_caps_get_largest_free_block( uint32_t caps )
 {
     multi_heap_info_t info;
@@ -384,6 +421,17 @@ void heap_caps_get_info( multi_heap_info_t *info, uint32_t caps )
             info->allocated_blocks += hinfo.allocated_blocks;
             info->free_blocks += hinfo.free_blocks;
             info->total_blocks += hinfo.total_blocks;
+            if (info->lowest_address == NULL) {
+                info->lowest_address = hinfo.lowest_address;
+                info->highest_address = hinfo.highest_address;
+            } else {
+                if ((char*)info->lowest_address > (char*)hinfo.lowest_address) {
+                    info->lowest_address = hinfo.lowest_address;
+                }
+                if ((char*)info->highest_address < (char*)hinfo.highest_address) {
+                   info->highest_address = hinfo.highest_address;
+                }
+            }
         }
     }
 }