SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

A garden of small programming language implementations 🪴

A pedagogic implementation of abstract bidirectional elaboration for dependent type theory.

A Teeny Type Theory

implementation deriving for idris2

An automated model car that tracks and follows objects. Built with RaspberryPi and Arduino, controlled by an iPhone.

prototype implementation of a dependently-typed language with an extendable constraints and accompanying materials

VHDL 87/93/2002/2008 simulator

Designing SPI Slave with Single Port RAM using questasim and vivado.

Agda formalisation of an elaborator for a simply typed language