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Add interchange clustering definition #91

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merged 2 commits into from
Jun 10, 2021

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acomodi
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@acomodi acomodi commented Jun 2, 2021

This PR is based on #70 and aims at redefining the BEL chaining to make it more flexible and allow also the definition of clusters to guide nextpnr placement.

It mainly detaches from using the schema, and directly adds information to the nextpnr chipdb.

It still is marked as WIP as it needs more iterations to get to a stable and reviewable state.

@acomodi acomodi marked this pull request as draft June 2, 2021 19:07
- ports:
- name: S[0]
bels:
- AFF
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this seems like an interesting one, the AFF rule here is presumably just a convenient heuristic, there's no dedicated route.

care is also going to need to be taken in nextpnr around the case where different chain driver FFs in the same tile have different control sets so can't legally be placed (in which case the FF has to go to another site)

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Right, didn't think of the case in which there are different FFs feeding in the same carry. I guess that this case can still be handled by removing conflicting FFs from the clustering in nextpnr, therefore allowing the placer to freely chose another location

bels:
- DFF
- D6LUT
in_out_cells:
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I'm wondering if a cell type and pin combination is more useful than just a cell type

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For context, the idea behind the in_out_cells was mainly to bind a cell to a cluster in case that cell is connected to both in and out ports of the main cluster cell (in this case the carry).
I'll need to think of a better representation for this and yeah I think a pin combination is actually the way to go

@acomodi acomodi force-pushed the interchange-clustering branch from 29db36a to 7d743b7 Compare June 8, 2021 16:04
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acomodi commented Jun 8, 2021

I have refactored the whole clustering for the interchange a bit, so as to have a more concise and possibly cleaner description.

Now, with the changes combined in nextpnr, we can still place and route carry chains for the counter test correctly, and I am currently testing the Murax design implementation.

With these modifications, it should be more trivial to add also LUT+FF cluster definitions (which will not have the chainable_ports as carry chains do).

The idea is to have a set of cell and the corresponding pins for a root cluster type, so that, during placement, the BELs to use for the cluster cells connected to the root can be discovered dynamically through a quick expansion.

@acomodi acomodi force-pushed the interchange-clustering branch 2 times, most recently from 0750f5b to 6f8c643 Compare June 9, 2021 14:25
@@ -1080,6 +1174,7 @@ def append_bba(self, bba, label_prefix):
'GlobalCellPOD',
'MacroPOD',
'MacroExpansionPOD',
'ClusterPOD',
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Sure, done

@acomodi acomodi changed the title WIP: Interchange clustering Add interchange clustering definition Jun 10, 2021
@acomodi acomodi marked this pull request as ready for review June 10, 2021 10:59
@acomodi acomodi requested a review from gatecat June 10, 2021 10:59
acomodi and others added 2 commits June 10, 2021 13:43
This aims at guiding the placer into solving complex cases such as
carry-chains and other special connection patterns among cells (e.g.
LUT+FF)

Signed-off-by: Alessandro Comodi <[email protected]>
Co-authored-by: Jan Kowalewski <[email protected]>
Signed-off-by: Alessandro Comodi <[email protected]>
@acomodi acomodi force-pushed the interchange-clustering branch from 8a45aa7 to dd067aa Compare June 10, 2021 11:43
@acomodi acomodi merged commit 7725573 into chipsalliance:master Jun 10, 2021
@acomodi acomodi deleted the interchange-clustering branch June 10, 2021 15:58
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2 participants