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Add interchange clustering definition #91
Add interchange clustering definition #91
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test_data/series7_device_config.yaml
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- ports: | ||
- name: S[0] | ||
bels: | ||
- AFF |
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this seems like an interesting one, the AFF
rule here is presumably just a convenient heuristic, there's no dedicated route.
care is also going to need to be taken in nextpnr around the case where different chain driver FFs in the same tile have different control sets so can't legally be placed (in which case the FF has to go to another site)
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Right, didn't think of the case in which there are different FFs feeding in the same carry. I guess that this case can still be handled by removing conflicting FFs from the clustering in nextpnr, therefore allowing the placer to freely chose another location
test_data/series7_device_config.yaml
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bels: | ||
- DFF | ||
- D6LUT | ||
in_out_cells: |
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I'm wondering if a cell type and pin combination is more useful than just a cell type
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For context, the idea behind the in_out_cells
was mainly to bind a cell to a cluster in case that cell is connected to both in and out ports of the main cluster cell (in this case the carry).
I'll need to think of a better representation for this and yeah I think a pin combination is actually the way to go
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I have refactored the whole clustering for the interchange a bit, so as to have a more concise and possibly cleaner description. Now, with the changes combined in nextpnr, we can still place and route carry chains for the counter test correctly, and I am currently testing the Murax design implementation. With these modifications, it should be more trivial to add also LUT+FF cluster definitions (which will not have the The idea is to have a set of cell and the corresponding pins for a |
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@@ -1080,6 +1174,7 @@ def append_bba(self, bba, label_prefix): | |||
'GlobalCellPOD', | |||
'MacroPOD', | |||
'MacroExpansionPOD', | |||
'ClusterPOD', |
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as you are changing the bba structures, you need to bump https://github.com/SymbiFlow/python-fpga-interchange/blob/6f8c64327afdf7b88643bad52e3b5e1caa633006/fpga_interchange/chip_info.py#L1138 and the corresponding value in nextpnr: https://github.com/YosysHQ/nextpnr/blob/13c037cc0847d8eea94dabf719ca17dad69254c9/fpga_interchange/chipdb.h#L37
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Sure, done
This aims at guiding the placer into solving complex cases such as carry-chains and other special connection patterns among cells (e.g. LUT+FF) Signed-off-by: Alessandro Comodi <[email protected]> Co-authored-by: Jan Kowalewski <[email protected]>
Signed-off-by: Alessandro Comodi <[email protected]>
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This PR is based on #70 and aims at redefining the BEL chaining to make it more flexible and allow also the definition of clusters to guide nextpnr placement.
It mainly detaches from using the schema, and directly adds information to the nextpnr chipdb.
It still is marked as WIP as it needs more iterations to get to a stable and reviewable state.