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Envelope Counter
The envelope counter is built as an 8 bit ripple counter with inverted odd bits.
This is the layout of two bits:
The even bits are comprised of an XOR logic that sums the Carry in and the previous bit value and an inverted XOR gate that inverts the output when counting downwards. The bit value is inverted when the cnt_clk_inv is high, which happens when counting direction switches.
The carry output is calculated as following:
- Cout = ¬(/Cin ∨ /bit_old)
The new bit value is obtained with this formula:
- bit_new = ¬(Cout ∨ (/bit_old ∧ /Cin)) = /Cin ⊕ /bit_old
And the bit output is calculated as:
- cnt_out = ¬((bit_new ∧ ¬cnt_up) ∨ (¬bit_new ∧ cnt_up)) = ¬(bit_new ⊕ cnt_up)
(bit_old is used in place of /bit_old when cnt_clk_inv is active)
For the odd bits the first XOR logic is inverted.
The carry output is calculated as following:
- /Cout = ¬(Cin ∧ bit_old)
And the new bit value is calculated as:
- /bit_new = ¬(/Cout ∧ (bit_old ∨ Cin)) = ¬(Cin ⊕ bit_old)
And the bit output is calculated as:
- /cnt_out = ¬((/bit_new ∧ ¬cnt_up) ∨ (¬/bit_new ∧ cnt_up)) = ¬(/bit_new ⊕ cnt_up)
(/bit_old is used in place of bit_old when cnt_clk_inv is active)
These tables summarize the bit logic:
Even:
/Cin | /bit_old | Cout | bit_new |
---|---|---|---|
0 | 0 | 1 | 0 |
0 | 1 | 0 | 1 |
1 | 0 | 0 | 1 |
1 | 1 | 0 | 0 |
cnt_up | bit_new | cnt_out |
---|---|---|
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
Odd:
Cin | bit_old | /Cout | /bit_new |
---|---|---|---|
0 | 0 | 1 | 1 |
0 | 1 | 1 | 0 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 1 |
cnt_up | /bit_new | /cnt_out |
---|---|---|
0 | 0 | 1 |
0 | 1 | 0 |
1 | 0 | 0 |
1 | 1 | 1 |
The bit_new value is the sum of bit_old and the carry from the previous bit. The input carry for bit 0, active low, controls the counter clocking while the cnt_up signal controls the counter direction, inverting the output when low. The feedback loop is controlled by the cnt_clk signal except in the cycle when counting direction changes during which cnt_clk_inv is used to invert the bit values.
Clock
Reset
Address Decoders
Data Bus
Registers
Oscillator
Pulse Waveform
Triangle Waveform
Noise Generator
Wave Selector
Envelope Overview
Envelope Counter
Sustain Comparator
ADSR registers
Counter Logic
Exponential Divider
LFSR15 counter
LFSR5 counter
Analog stage overview
6581 DACs
6581 Opamps
6581 Filter overview
6581 Audio output
8580 DACs
8580 Virtual ground
8580 AC Voltage divider
8580 Opamps
8580 Filter overview