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Reset
f00b4r0 edited this page Feb 1, 2021
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This is the reset input pin. There's a ggNMOS for electrostatic discharge protection, then a push-pull inverter and, after a clocked gate, a couple of inverters. The circuitry regenerates and inverts the signal, as the input is active low, to dispatch it to the whole chip.
Clock
Reset
Address Decoders
Data Bus
Registers
Oscillator
Pulse Waveform
Triangle Waveform
Noise Generator
Wave Selector
Envelope Overview
Envelope Counter
Sustain Comparator
ADSR registers
Counter Logic
Exponential Divider
LFSR15 counter
LFSR5 counter
Analog stage overview
6581 DACs
6581 Opamps
6581 Filter overview
6581 Audio output
8580 DACs
8580 Virtual ground
8580 AC Voltage divider
8580 Opamps
8580 Filter overview