-
Notifications
You must be signed in to change notification settings - Fork 0
LFSR5 counter
The LFSR5 counter further divides the clock during the decay/release phases to approximante an exponential curve.
It isbased on the circuitry we know from the LFST15 counter, it just looks a little bit more complicated:
Either LFSR5_clkS (shift) or LFSR5_clkH (don't shift, hold value) is active during sid_clk2.
Having that feedback path controlled by LFSR5_clkH was necessary because else the LFSR5 counter would lose the stored bits after some time without LFSR5_clkS being high.
Circuitry for generating the two clock signals LFSR5_clkS and LFSR5_clkH depending on if there was an "overflow" in the LFSR15 counter:
Clock
Reset
Address Decoders
Data Bus
Registers
Oscillator
Pulse Waveform
Triangle Waveform
Noise Generator
Wave Selector
Envelope Overview
Envelope Counter
Sustain Comparator
ADSR registers
Counter Logic
Exponential Divider
LFSR15 counter
LFSR5 counter
Analog stage overview
6581 DACs
6581 Opamps
6581 Filter overview
6581 Audio output
8580 DACs
8580 Virtual ground
8580 AC Voltage divider
8580 Opamps
8580 Filter overview